The working principle of AD7890 serial A/D converter and its realization and DSP interface design

With the advancement of industrial technology, the requirements for the execution efficiency and integration degree in the digital control servo system are getting higher and higher. For example, when using a single processor to control multiple servo systems, the efficiency of multi-channel A/D conversion is relatively high. In the past, multiple analog switches and single-channel A/D converters were used more frequently, and the efficiency was low, and the noise caused by the use of analog switches was also more serious.

With the advancement of industrial technology, the requirements for the execution efficiency and integration degree in the digital control servo system are getting higher and higher. For example, when using a single processor to control multiple servo systems, the efficiency of multi-channel A/D conversion is relatively high. In the past, multiple analog switches and single-channel A/D converters were used more frequently, and the efficiency was low, and the noise caused by the use of analog switches was also more serious. Here, the serial multi-channel A/D converter AD7890 and the SPI interface of the TMS320F2812 processor are selected to form an A/D conversion module, which is very suitable for application in a multi-axis servo system. AD7890 is an 8-channel 12-bit serial A/D converter with high conversion efficiency (conversion time is only 5.9μs), high-speed and flexible serial interface, multi-channel and other advantages. Among them, the input voltage range of AD7890-10 is -10~+10 V. The TMS320F2812 processor integrates a variety of advanced peripherals, which provides a good platform for realizing motor and other motion control applications. The SPI interface it provides is usually used between DSP processors and external devices and other processors. Communication. SPI is divided into two working modes: master and slave. The data length is programmable (1~16 b), and it can receive and send at the same time. It is usually used for communication between the DSP processor and external peripherals and other processors. It can easily communicate with AD7890 in master/slave mode.

1. AD7890 working mode and principle

The SMODE pin of AD7890 is the working mode control input terminal, which determines whether the device works in external clock mode (as a slave) or internal clock mode (as a master). When SMODE is set to high level, the device works in external clock mode. The master device provides clock signal SCLK and receiving frame synchronization signal RFS. The maximum serial clock frequency that can be received by AD7890 is up to 10 MHz; when SMODE is set to low level, The device works in the internal clock mode. It provides the clock signal SCLK and receives the frame synchronization signal RFS. The clock frequency is determined by the input clock frequency of the CLK pin. This text regards DSP as the main controller, AD7890 as the slave device, the serial clock is provided by the SPI port of the DSP.

AD7890 receives the control word and outputs the conversion result through the on-chip high-speed bidirectional serial data interface. The conversion channel, conversion start signal and other information can be determined by writing data to the control register. The control register contains 5 bits of data, so at least 6 SCLK pulses are required to complete the write operation to the register. Among them, A2, A1, and A0 are respectively the highest bit, the second highest bit, and the lowest bit of the channel address. The channel selection algorithm is: channel number=4A2+2A1+A2+1. The data after the falling edge of the fifth SCLK pulse of sending data is invalid data. After the control word is written into the register, the device starts the internal delay pulse to ensure that the tracking/holding device has enough time to complete the establishment and switching of the conversion channel before the conversion starts. The delay pulse width depends on the CEXT value of the pin capacitance. Generally, the pin capacitance value is CEXT, 120 pF or 200 pF. According to the test, the delay pulse width is about 7. Oμs and 9.6μs. When writing data to the control register, CEXT, the pin level changes from low to high, and the capacitor starts to discharge at the falling edge of the sixth clock pulse. When the voltage drops below 2.5 V, the internal delay pulse ends, and the A/D conversion Start, the conversion ends after 5.9μs. If the serial read operation has been completed at this time, and RFS has become high, then update the output register with the new conversion result. At this point, an A/D conversion is over. Figure 1 is the working principle diagram of AD7890. The picture obtained from the oscilloscope shows the relationship between the CEXT pin level, SCLK pulse and the time of the A/D conversion process.

The working principle of AD7890 serial A/D converter and its realization and DSP interface design

2. AD7890 working sequence and reading and writing operation method

There are two ways to control the conversion of AD7890. One is hardware control, that is, the CONVST pin is set low, the device generates a narrow low-level pulse, and the A/D conversion starts at the rising edge of the pulse, provided that 0 must be written to the CONV bit; the second is software control, that is, to Write 1 to the cONV bit of the control register, and the CONVST pin has no effect at this time. The difference between the two is that when hardware control is used to start the conversion, the conversion is started on the rising edge of CONVS MN. At this time, it must be ensured that the internal delay pulse has ended; for software control, the conversion starts immediately when the internal delay pulse ends. It should be noted that when writing data to the control register, before the end of the 6 write operation clock pulses, the sending frame synchronization signal TFS must remain low, otherwise the write operation cannot be successful. During the reading of the A/D conversion result, the received frame synchronization signal RFS must remain low. RFS and TFS are connected together, so that the read and write operations of the SPI port can be performed at the same time. Regard DSP as the master device, AD7890 is regarded as the slave device, namely work under the external clock mode, at this moment read, write operation sequence is shown as in Fig. 2 respectively. The SPISTE Li pin of DSP has the function of chip selection from the device. When this pin is low, it can send data to the slave device. This pin is used as a general receiving and sending frame synchronization signal to control RFS and TFS.

The working principle of AD7890 serial A/D converter and its realization and DSP interface design

3. Hardware implementation of SPI interface between AD7890 and TMS320F2812

TMS320F2812 is a digital signal processor launched by TI. Its superior performance in motor control makes it widely used in industrial control. The serial peripheral interface (SPI) it provides is a high-speed synchronous serial input/output port, including 4 external pins: slave output/master input pin (SPISOMI), slave input/master output pin ( SPISIMO), slave transmit enable pin (SPISTE), serial clock pin (SPICLK). The main feature of SPI is that it can send and receive serial data at the same time; it can work as a master or a slave; it provides a frequency programmable clock; it sends an end interrupt flag.

The working principle of AD7890 serial A/D converter and its realization and DSP interface design

After determining the low-speed peripheral clock LSPCLK of the DSP, determine the baud rate SCLK through the baud rate control register SPIBRR. The specific calculation method of baud rate is: when SPIBRR=3~127, SCLK=LSPCLK/(SPIBRR+1); when SPIBRR=0,1,2, SCLK=LSPCLK/4, so there are 125 kinds of programmable waves in total Special rate. In the article, the operating frequency of the DSP is 120 MHz, and the low-speed clock LSPCLK is 30 MHz, so the programmable baud rate range is 234. 375 kb/s to 7.5 Mb/s. By increasing the system low-speed clock, the programmable baud rate range can be increased; by selecting a higher baud rate, the data transmission rate can be increased, that is, the A/D conversion efficiency can be improved. The SPI interface hardware connection block diagram of AD7890-10 and TMS320-F2812 is shown as in Fig. 3.

The working principle of AD7890 serial A/D converter and its realization and DSP interface design

Because the data level of AD7890-10 is 5 V, and the voltage that the I/ O of TMS320F2812 can bear is up to 3. 3 V, therefore must carry on the level conversion to the A/ D conversion result, convert it into I/ 0 mouth The voltage that can withstand. There are many ways to convert the 5 V level to 3.3 V level. There are two commonly used ones. One is to select specialized level conversion devices, such as TI’s SN74I. VTHl6245; The second is to output the A/D conversion result to the DSP through the I/O port of the CPLD in the system, provided that the selected CPLD can withstand the input voltage of 5 V and the output is 3.3 V. This text adopts the latter method, chooses EPM7128ST1100-10 of Altera Company, supplies 3.3 V power to the I/O of CPLD to meet the requirement. Switch the A/D data through an I/O port of a CPLD, and then output to the DSP after logic processing by software. It should be noted that in order to avoid noise interference, all unused pins of AD7890 cannot be left floating, and must be connected to a fixed level within the acceptable range. Experiments show that, especially the CLKIN pin can not be left floating, otherwise it may cause the A/D conversion to fail. For AD7890-10, when the unused input channel voltage is lower than -12 V, it will cause serious interference to the conversion of other selected channels. The method adopted in the article is to connect the external clock input pin SCLK with the internal clock input pin CLKIN, which can effectively remove interference.

4. Software read and write implementation

For the SPI interface, data and serial clock pulses are generated at the same time, that is, clock pulses are generated only when there is data transmission on the data line. So after sending the control data, the data received by the DSP is not the real A/D conversion result, but it is necessary to read the receiving buffer register data to reset the SPI. Many experiments have shown that for a single A/D conversion, after the conversion, it is necessary to send two empty control data 0x0000 to the AD7890, and then the data in the SPI receiving buffer register of the DSP is the correct A/D conversion result, namely Three data exchanges are required for each A/D sampling cycle to obtain effective A/D conversion data. Use the query method to judge whether the data transmission is over, that is, when the SPIINT FLAG bit of the SPI status register is 1, it means that the data transmission has been completed. The flow chart of the software implementation of A/D conversion is shown in Figure 4.

The working principle and implementation of AD7890 serial A/D converter and the design of the interface with DSP. For AD7890-10, the A/D conversion result data is in two’s complement format and contains channel data, so after reading the result, the data should be adjusted as needed Proper processing, including shielding channel selection data and code conversion, etc., in order to convert into the digital quantity required by the system. To facilitate processing, the code value corresponding to the voltage of -10 to +10 V is converted to 0 to 4 096. The processing method in the article is as follows: after the high four-bit channel data of the conversion result is shielded, if the A/D input is a positive voltage, the low 12-bit result is added to 0x0800 to obtain the processed data; if the A/D input is a negative voltage, Then, the complement code is converted into the original code and the difference is made with 0xF800 to obtain the processing result.

After many tests, the corresponding relationship between the running time of the A/D conversion subroutine (that is, the total time consumed for one A/D conversion) and the baud rate is shown in Table 1.

The working principle of AD7890 serial A/D converter and its realization and DSP interface design

As can be seen from Table 1, in order to improve the conversion efficiency, the highest possible baud rate should be selected within the tolerable range, but it should not exceed the upper limit of AD7890-10, 10 Mb/s. The actual application of the SPI interface in the text shows that the A/D conversion performance is very stable, the efficiency is high, and the conversion accuracy is high. The error is only ±1 code, about 4.88 mV.

5 Conclusion

Use DSP’s serial peripheral interface SPI and serial multi-channel A/D converter AD7890 to form a digital servo system A/D conversion function realization module, which can complete the conversion of 8 channels from analog to digital, with high efficiency and interface Simple and stable performance. By choosing a higher baud rate, the data transmission time can be shortened and the A/D conversion efficiency can be improved. When the external clock SCLK provided by the DSP is the highest value 10 MHz that the AD7890 can withstand, it only takes 12.4μs for a single channel to completely complete an A/D conversion. The interface design made in this article provides a practical choice and reference for the A/D conversion module of the multi-axis digital control system.

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