The perilous road from sensor to ADC: what should engineers do?

A common challenge in countless industrial, automotive, instrumentation, and numerous other applications is how to properly connect tiny sensor signals to ADCs for digitization and data acquisition. The sensor signal is usually very weak, can be very noisy, and appears to be a very high impedance source above a large common-mode (CM) voltage.

By Hooman Hashemi, Product Applications Engineer, Analog Devices

Is there a module that will allow me to directly convert the tiny sensor output signal to ADC input voltage?

Yes, ADI’s newest family of instrumentation amplifiers can do the following tasks in one fell swoop: reject common-mode signals, amplify differential-mode signals, convert the voltage to the required ADC input voltage, and protect the ADC from overvoltage!

A common challenge in countless industrial, automotive, instrumentation, and numerous other applications is how to properly connect tiny sensor signals to ADCs for digitization and data acquisition. The sensor signal is usually very weak, can be very noisy, and appears to be a very high impedance source above a large common-mode (CM) voltage. These are undesirable for ADC inputs. This article will introduce the latest integrated solutions that can completely solve the problems that engineers are asking beyond their current capabilities. This article also details the design steps to configure a complete sensor interface instrumentation amplifier to drive the ADC input.

The perilous road from sensor to ADC: what should engineers do?
Figure 1. Challenges from sensor to ADC

What is the right sensor and why is it a problem?

The short answer to this question is an instrumentation amplifier. Sensors are suitable for connection to instrumentation amplifiers.

Instrumentation amplifiers have high accuracy (low offset) and low noise without corrupting small input signals. Its differential inputs are suitable for many sensor signals (such as strain gauges, pressure sensors, etc.) and are capable of rejecting any common mode signals present, leaving only the original small voltages of interest and no unwanted common mode signals . Instrumentation amplifiers have a large input impedance that does not load the sensor, ensuring that fragile signals are not affected by signal processing. In addition, instrumentation amplifiers typically provide a large gain and selectable gain range using a single external resistor, making them very flexible to accommodate small signals of interest to voltages and ADC analog inputs well above the signal path noise level. Instrumentation amplifiers are designed for precision performance and are internally tuned to maintain their performance over a wide operating temperature range and are not affected by supply voltage variations. The instrumentation amplifier also has very low gain error, which also helps it maintain accuracy and limit measurement or signal errors due to swing changes.

What do you like to see at the ADC input?

Driving ADC inputs is not that easy. The internal capacitance of the front end (C in Figure 2DAC) switching operations cause charge injection, which makes transferring a stable signal with high linearity for ADC quantization a difficult task. The driver driving the ADC input must be able to handle these large charge injections and settle quickly before the next conversion cycle. Also, depending on the ADC resolution (bits), the noise and distortion of the driver should not be a limiting factor.

The perilous road from sensor to ADC: what should engineers do?
Figure 2. ADC input driving is challenging

Achieving the above requirements is no easy task, especially for low-power drivers. In addition, due to the modernization of semiconductor technology, the ADC operating power supply voltage is decreasing day by day. One of the undesirable side effects of this trend is that ADC inputs become more susceptible to input overvoltage and can cause injury or damage. This requires external circuitry to guard against this overvoltage. Not only should such external circuits not add any measurable noise to the signal, but they should also not limit bandwidth or cause any form of distortion. It is also highly desirable for the entire circuit to react quickly and recover quickly from an overvoltage event.

There are also challenges in offsetting the input signal to fit the ADC analog input voltage range. Any circuit elements added to perform this task must adhere to all the constraints listed previously (ie low distortion, low noise, adequate bandwidth, etc.).

If only the in-amp could drive the ADC directly!

All instrumentation amplifiers on the market have some drawbacks, so more circuit elements are required to complete the path from the physical world (sensors) to the digital world (ADC). Traditionally, instrumentation amplifiers have not been the circuit element of choice for driving ADCs (some ADCs are more precise than others). There’s enough of an instrumentation amp to do, it doesn’t seem fair to expect it to do more!

Overcoming harmonic distortion (HD) in ADC drivers is a difficult challenge. Below is an expression for the distortion performance that an ADC driver must meet or exceed as a function of ADC resolution:
SINAD = 6.02 × ENOB + 1.76 dB (1)
SINAD: SNR + Distortion
ENOB: effective number of digits

Therefore, for 16-bit ENOB, SINAD ≥ 98 dB

Instrumentation amplifiers on the market today are generally not designed to drive ADC inputs. The most common reason for this is that these devices lack the linearity required for high-resolution ADCs. Linearity or harmonic distortion (also known as THD, or total harmonic distortion) is the most likely limiting factor, preventing the in-amp from directly driving the ADC. When complex waveforms are digitized, once they are disturbed by distortion terms, the signal cannot be distinguished from such disturbances, and data acquisition will be destroyed! The driver should also be able to settle quickly from the ADC input charge injection transients explained earlier.

Improve the current solution

Now, the new family of in-amps not only does everything an in-amp has traditionally done, but also drives ADCs directly and protects the ADC inputs very well! The LT6372-1 (supporting 0 dB to 60 dB gain) and LT6372-0.2 (supporting C14 dB to +46 dB gain/attenuation) can help with the task of interfacing with precision sensors, directly driving ADC inputs.

There are clear advantages to using a high precision, low noise instrumentation amplifier such as the LT6372 family to directly drive the ADC analog input without the need for an additional amplification or buffer stage. Some of these benefits include: reduced component count, lower power consumption and cost, reduced board area, high CMR, excellent DC accuracy, low 1/f noise, and gain selectable by a single component.

Many high-speed op amps chosen as ADC drivers may not have the low 1/f noise characteristic of the LT6372 family, which is fabricated on a proprietary process. Additionally, additional buffering and gain stages may need to be added to amplify tiny sensor signals. When using an instrumentation amplifier to directly drive an ADC, neither the amplifier stage nor the reference has the equivalent of an additional noise source or DC offset term.

The perilous road from sensor to ADC: what should engineers do?
Figure 3. Ideal Sensor Amplifier/ADC Driver

The LT6372-1 and LT6372-0.2 have extremely high input impedance, can interface with sensors or similar signal inputs, and provide large gain (LT6372-1) or attenuation (LT6372-0.2) without causing loading effects, while their low distortion and low noise ensure accurate conversions without performance degradation, enabling 16-bit and lower resolution ADCs to operate at rates up to 150 kSPS. Figure 4 shows the achievable bandwidth for each device at a given gain setting.

The LT6372-1 distortion versus frequency is shown in Figure 5, and it should be ensured that the distortion term does not affect the THD performance of the ADC at the highest frequency of interest. Taking the ADC LTC2367-16 as an example, its SINAD specification is 94.7 dB. To ensure that the driver is not a major factor, Figure 5 shows that the LT6372-1 is a suitable choice for frequencies less than about 5kHz.

The subtleties of the LT6372-1 as an ADC driver

In addition to the aforementioned advantages, the split reference architecture of the LT6372 family (shown as separate RF1 and RF2 pins in Figure 6) allows the signal to be effectively shifted directly into the ADC FS voltage range without the use of additional reference and other external circuits for the same purpose, reducing cost and complexity. For most ADCs, REF2 (shown here with VOCMDC voltage) will be connected to the ADC VREFvoltage is connected, this will ensure that the ADC analog input midscale is VREF/2.

The perilous road from sensor to ADC: what should engineers do?
Figure 4. Frequency Response of LT6372-1 and LT6372-0.2 at Various Gains

The perilous road from sensor to ADC: what should engineers do?
Figure 5. LT6372-1 THD vs. Frequency

The built-in output clamps (CLHI and CLLO) of the LT6372 family ensure that the sensitive inputs of the ADC are not disrupted or potentially damaged by positive or negative going transients. The family supports distortion-free output swings up to the clamp voltage, with fast response and recovery, protecting the ADC and returning it to normal operation quickly after a possible transient triggers either clamp.

The analog input of some SAR ADCs presents a challenging load to the amplifier drive. Amplifiers need to have low noise, fast settling, and high dc accuracy to keep disturbances from interfering signals to one LSB or less. Higher sampling rates and higher-order ADCs also place higher demands on the amplifier. Figure 7 shows the input to a typical SAR ADC.

The switch positions shown in Figure 7 correspond to sampling or acquisition mode, in which the analog input is connected to the sampling capacitor CDACand then start the conversion in the next work phase.

Before this phase begins, switch S2 has set CDACThe voltage is discharged to 0 V or other bias point such as FS/2. At the beginning of the sampling period, with S1 closed and S2 open, the voltage difference between VSH and the analog input causes a transient current to flow such that CDACCan be charged up to the analog input voltage. For higher sampling rate ADCs, this current can be as high as 50 mA. Capacitor CEXTHelps mitigate the step change in the amplifier’s output voltage caused by this current step, but the amplifier will still be disturbed by it and needs to settle in time before the end of the acquisition cycle. Resistor REXTConnect the drive with CEXTisolation, and also reduce its impact on stability when driving large capacitors. About REXTand CEXTThe choice of value is a trade-off between the greater isolation caused by this current injection and the reduced settling time performance caused by the low-pass filter formed in this way. This filter also helps reduce out-of-band noise and improves SNR, but this is not its primary function.

ADC front-end RC component value design

choose REXTand CEXTThere are many factors to consider when determining the value of . The following is a summary of the factors that affect the dynamic response of an ADC measured by FFT or other means:
CEXT: A charge bucket that acts as a kickback of the input charge, minimizing voltage steps and improving settling time.
Too Big: May affect amplifier stability and may reduce the LPF roll-off frequency too low for the signal to pass.
Too Small: The charge kickback at the ADC input is too large to settle in time.

REXT: at the amplifier output and CEXTisolation is provided to ensure stability.
Too large: May make the settling time constant too long.Can also cause increased THD when accounting for ADC input nonlinear impedance1. May increase IR drop error.
too small: due to CEXTthe amplifier may become unstable or its forward path establishment may be affected.

The perilous road from sensor to ADC: what should engineers do?
Figure 6. The LT6372 split reference is used to shift the signal into the ADC analog input signal range

The perilous road from sensor to ADC: what should engineers do?
Figure 7. SAR ADC Input in Acquisition/Sampling Mode

Below is the design REXTand CEXTSome design steps of the value, taking the LT2367-16 ADC as an example, which is driven by the LT6372-1, the maximum input frequency fINis 2kHz and the sampling rate is 150 kSPS (see Reference 1 for a complete derivation of some of the formulas below):

Choose a large enough CEXTActs as a charge bucket, minimizing charge recoil:

The perilous road from sensor to ADC: what should engineers do?

in:

CDAC: ADC input capacitance = 45 pF (LTC2367-16)
→ CEXT = 10 nF (selected value)
Calculate the ADC input voltage step VSTEP using the following equation:

The perilous road from sensor to ADC: what should engineers do?

in:

VREF = 5V (LTC2367-16)
CDAC: ADC input capacitance = 45 pF (LTC2367-16)
CEXT = 10 nF (before)
→ VSTEP = 22 mV (calculated)

NOTE: This VSTEPThe function assumes CDACIt is discharged to ground at the end of each sample period, as does the LTC2367-16. V in Reference 1STEPThe formula uses different assumptions as it is for the ADC architecture, CDACThe voltage was kept constant for each sample.
Assuming the step input is built exponentially, calculate how many inputs R are neededEXT×CEXTtime constant NTCto create:

The perilous road from sensor to ADC: what should engineers do?

in:

VSTEP: ADC input voltage step calculated previously
VHALF_LSB: LSB/2, in volts. For 5 V FS and 16-bit, it is 38 μV (= 5 V/217)
→ NTC = 6.4 time constants

Calculate the time constant τ:

The perilous road from sensor to ADC: what should engineers do?

in:

tACQ: ADC acquisition time; tACQ = tCYC C tHOLD

Assuming a sampling rate of 150 kSPS:
tCYC = 6.67 μs (= 1/150 kHz)
tHOLD = 0.54 μs (LTC2367-16)

Therefore: tACQ = 6.13μs
→ τ ≤ 0.96 μs

Given τ and CEXTIn the case of , it is possible to calculate REXT:

The perilous road from sensor to ADC: what should engineers do?
→ REXT ≤ 96Ω

Now that we have the external RC value, the selected ADC can settle properly. If the calculated REXTtoo high, you can increase CEXTand recalculate REXTto decrease its value and vice versa. Figure 8 shows that CEXTThe selected value of and the corresponding REXTvalue to simplify the computational task under the working conditions of this example.

The perilous road from sensor to ADC: what should engineers do?
Figure 8. The ADC correctly establishes the corresponding external input RC relationship

Use the previous steps to find the right REXTand CEXTstarting value. Benchmarking and evaluation should be performed and these values ​​optimized as needed, keeping in mind the performance impact of such changes.

Summarize

Introduced a new family of instrumentation amplifiers that help connect sensors to data acquisition devices. This article explores the characteristics of these devices in detail, and uses a practical example to illustrate how to design ADC front-end components to ensure that the combination of driver and ADC provides the desired resolution.

The Links:   NL8060BC26-27 DMF50260NFU-FW-31