Tackling new challenges of higher power density with PowerTrench MOSFETs

Central topic:

• Power MOSFETs optimized for synchronous rectification
• Power Calculation of Synchronous Rectification
• Harmful voltage spikes on switches

solution:

• Optimized Synchronous Rectification Scheme for Trench Gate MOSFET
• Measures to reduce harmful voltage spikes on switches

From a topological point of view, synchronous rectifiers have lower conduction and switching losses, which can improve the efficiency of these conversion stages, and thus are the basic building blocks on the secondary side of switch-mode power supplies, in low-voltage and high-current applications such as server power supplies or telecom rectifiers. very popular in the application. As shown in Figure 1, it replaces the Schottky rectifier, resulting in a smaller voltage drop. From a device perspective, the past decade has seen tremendous progress in power MOSFET transistors, resulting in novel topologies and high power density power supplies. After the advent of planar technology in the early 20th century, low- and medium-voltage MOSFETs were rapidly developed, utilizing trench gate technology to dramatically improve performance. Trench-gate MOSFETs are the power devices of choice for low- to mid-voltage power applications, which embed a gate structure into a trench region that is carefully etched into the device structure. This new technology can increase trench density and eliminate the need for JFET impedance components, thus reducing the characteristic on-resistance by about 30%. When the product of the on-resistance of the MOSFET and the drain current is less than the diode forward voltage drop, the energy loss of synchronous rectification is reduced.

Figure 1 Diode Rectification and Synchronous Rectification

However, low on-resistance is not the only requirement for power switches when it comes to synchronous rectification. To reduce drive losses, the gate charge of these devices should also be small. The reverse recovery characteristics of the soft body diode help to attenuate the peaks of the voltage spikes, thereby reducing snubber circuit losses. In addition, there are switching losses caused by the output charge QOSS and the reverse recovery charge Qrr. Therefore, the key parameters of medium and low voltage MOSFETs, such as RDS(ON), QG, QOSS, Qrr and reverse recovery characteristics, directly affect the efficiency of the synchronous rectification system. The new medium-voltage power MOSFETs, called PowerTrench MOSFETs, are highly optimized for synchronous rectification, providing higher efficiency and power density for server power supplies or telecom rectifiers.

Power MOSFETs optimized for synchronous rectification

In switch-mode power supplies, RDS(ON)×QG FOM (Quality Factor) is generally regarded as the only important indicator to measure MOSFET performance. Therefore, several new techniques have been developed to improve the RDS(ON)×QG FOM. Although MOSFET technology and cell structures have undergone tremendous innovations over the years, MOSFET vertical cell structures can still be broadly classified into three categories: planar, trench, and lateral. Among these three types of structures, trench-gate MOSFETs have become the mainstream of high-performance discrete power MOSFETs with BVDSS

The trench gate structure can greatly reduce the trench impedance (Rchannel) and the JFET impedance (RJFET), and for low-voltage MOSFETs (BVDSS

Figure 2 Traditional trench gate MOSFET Figure 3 Trench MOSFET with thick oxide on the bottom

This solution not only helps to reduce the gate-drain superimposed capacitance CGD, but also improves the impedance of the drift region. In addition, it is also beneficial to reduce on-resistance and gate charge, as lower Vth and on-resistance can now be achieved with thin gate oxides, while also using thicker oxides at the bottom of the trenches to get the lowest CGD. Another technique is to use charge balance or superjunction device structures. It was originally developed for high voltage devices and is now also available for low voltage devices. Using the charge balance scheme, two-dimensional charge coupling can be achieved in the drift region, thus enabling higher doping concentrations in the drift region, ultimately reducing drift resistance. Compared with the previous generation technology, this new medium-voltage power MOSFET not only has a significant improvement in characteristic impedance, but also its already excellent switching characteristics have been further improved.

Figure 4 Trench MOSFET with added shield electrode

In addition to RDS(ON) and QG, other parameters in the synchronous rectification structure, such as body diode reverse recovery, internal gate impedance, and MOSFET output charge (QOSS), are now becoming more relevant. The importance of these loss components becomes more pronounced at higher switching frequencies and output currents. Fairchild’s medium voltage MOSFET products are now optimized for diode reverse recovery and output capacitance minimization.

Power consumption of synchronous rectification

The main power dissipation in a power switch is conduction loss and switching loss. There are also capacitive losses due to output capacitance, off-state losses due to leakage current, reverse recovery losses, and drive losses. In high-voltage high-power applications, these losses are often ignored; for multi-watt applications, capacitive losses are known to be as high as 50% or more of the total power dissipation. It is important to note that out-of-spec devices with excessive leakage current can lead to thermal dissipation failures, especially at high ambient temperatures, however this is very common. In low-voltage applications, drive losses can account for a significant portion of the total power dissipation because conduction losses are very small in low-voltage switches compared to high-voltage switches. At light loads, conduction losses are minimal and drive losses are more important. With the introduction of new efficiency norms such as the Climate Savers Computing Initiative, drive losses are a key factor in light-load efficiency. The drive loss can be obtained by the following equation.

Formula 1

Switching frequency and gate drive voltage are design parameters, while gate charge values ​​are provided by the data sheet. One difference between synchronous rectification and diode rectifiers is that the MOSFET is a bidirectional device. Figure 5 shows the current flowing through the MOSFET trench from source to drain during conduction, and through the body diode during dead time, in general. In synchronous rectification, the conduction of the body diode precedes the conduction of the gate, so the synchronous switch can adopt the zero-voltage switching technology. Since in the synchronous rectification, the soft switch works at the moment when the switch is turned on and off, and the dVds/vt is zero. Therefore, the capacitive current of the CGD (dVds/dt) is also zero.

Figure 5 Waveform of power MOSFET in synchronous rectification

Given this order, the gate charge values ​​in Equation 1 should be chosen carefully. Since there is no voltage across the synchronous switch at the moment of turn-on, the “Miller effect” does not occur. Thus, the resulting gate charge value is approximately equal to the total gate charge QG minus the gate-drain portion of the gate charge QGD. However, this is still an optimistic estimate of the drive losses, in practice the gate charge value of a synchronous switch is not equal to the simple QG-QGD estimate because in synchronous rectification there is a Negative bias, while QG and QGD in the data sheet are measured with positive bias. Also, the QSYNC curve below Vth is similar to the slope above Vth because in synchronous rectification, the drain-source voltage in both regions is zero during zero-voltage switching. The gate charge QSYNC of synchronous rectification can be measured using the simple circuit shown in Figure 6 and applying appropriate drive signals to Q1 and Q2.

Figure 6 Measurement of QSYNC

Using the known resistor value, QSYNC can be obtained from the following equation, which allows a more accurate estimate of gate drive power dissipation. In synchronous rectification, QSYNC is smaller, and the performance of the device is also better. As shown in Figure 7, there is no flat region on the gate-source voltage of the synchronously rectified power MOSFET.

Formula 2

Figure 7 Definition of QSYNC

In synchronous rectification, to reduce QSYNC, CGS (Ciss-Crss) is a more critical factor. As shown in Figure 8, due to design optimization, the CGS of the 3.6 milliohm PowerTrench MOSFET is significantly reduced compared to the 4.5 milliohm competitor. As shown in Table 1, the QSYNC of the 3.6 milliohm PowerTrench MOSFET is reduced by 22% and 59% compared to competing devices at 4.5 milliohms and 3.0 milliohms, respectively. Figure 9 calculates and compares the ratio of drive losses to conduction losses for a 27V synchronous rectifier stage with a gate drive voltage of 10V and a switching frequency of 100kHz. Here are two simultaneous switches, and at 10% load, the 3.0 milliohm competitor’s drive loss is twice the conduction loss.

Figure 8 Comparison of 100V Gate-Source Capacitance/3.6mOhm PowerTrench MOSFET with Competitors

Table 1: Comparison of key specifications of DUTs

Figure 9 Comparison of loss ratio (drive loss/conduction loss) under different output load conditions

The diode reverse recovery time (Trr) and reverse recovery charge (Qrr) specified on the data sheet are generally used for forward switching loss calculations. When calculating losses using the Qrr value on the data sheet, it is important to note that the body diode reverse recovery current is a function of many parameters such as forward current IF, reverse recovery diF/dt, DC bus voltage and junction temperature Tj , an increase in any of these parameters will lead to an increase in Qrr. Data sheet conditions are usually lower than typical converter operating conditions. Because switching converters need to switch power MOSFETs as fast as possible, edge rates, such as diF/dt, can be as much as 10 times faster than data sheet conditions, resulting in a large increase in Qrr for synchronous rectification.

The output charge Qoss and reverse recovery charge Qrr also cause losses while turning off the switch. Therefore, the power consumption due to Coss and Qrr can be obtained by the following equation.

Formula 3
Formula 4

Voltage spikes on the switch

A general rule of thumb for minimizing harmful voltage spikes is to use short, thick circuit boards with minimal current loops. However, this is not easy to do due to size and cost constraints. Sometimes designers have to take into account mechanical issues such as heat sinks and fans; sometimes cost constraints necessitate the use of single-sided printed circuit boards. Snubber circuits are a viable alternative to manage voltage spikes within the maximum rated drain-source voltage range. In this case, additional power consumption cannot be avoided. In addition, the power consumption generated by the buffer circuit itself under light load cannot be ignored. In addition to board parameters, device characteristics also have an impact on voltage spike levels. In synchronous rectification, a major device-related parameter is the body diode softness during reverse recovery. Basically, the reverse recovery characteristics of a diode are determined by design. There are several control inputs that affect reverse recovery, such as junction temperature, di/dt, and forward current levels. However, diodes always exhibit the same behavior when the conditions are fixed. Therefore, the evaluation results of the device are very useful for evaluating the operation of the system. Figure 10 shows the reverse recovery waveforms of two different devices (but with very similar ratings).

Figure 10 Reverse recovery waveforms of different softness factors

In the reverse recovery current waveform, the time from zero to peak reverse current is called ta. tb is defined as the time from peak to zero. The softness factor is defined as tb/ta. A soft device has a softness factor greater than 1, and when its softness factor is less than 1, the device is considered “snappy”. As can be seen from Figure 10, the peak voltage of the snappy diode is larger during reverse recovery. When all things being equal, the voltage spike of the snappy diode is always higher, thus causing additional losses in the snubber circuit. At light loads, this may be more important than reducing the on-resistance RDS(on) by 1 milliohm. Figure 11 shows the operating waveforms of the soft and snappy devices in a 500W PSFB DC-DC converter with a resonant frequency of 400kHz. The peak voltage of the soft device is 10% smaller than that of the snappy device, which can reduce the power consumption of the snubber circuit by 30% and improve the system efficiency by 0.5%. Although the RDS(on) of the soft device is 25% higher than that of the snappy device, at 20% load, the efficiencies are 94.81% and 94.29%, respectively. Both devices have the same efficiency at full load.

Figure 11 Peak drain-source voltage of power MOSFETs in a 500W PSFB DC-DC converter, soft device (left), snappy device (right) Another advantage of a soft body diode is its ability to use devices with lower breakdown voltage ratings. It also reduces conduction losses because the on-resistance per unit area is proportional to the breakdown voltage.

Summarize

To create a more efficient power switch for synchronous rectification, low RDS(on) is not the only requirement. As the importance of light load efficiency increases, gate drive losses and snubber circuit losses become significant loss factors. Therefore, low QSYNC and soft diodes become critical characteristics for higher synchronous rectification efficiency. However, RDS(ON) is still a critical parameter for the application. Figure 12 shows the relative power dissipation of different components under different loads and different device conditions in an 800W PSFB with synchronous rectification. Due to lower drive and output capacitive losses at 10% load, the total power dissipation of the 3.6mΩ PowerTrench MOSFET is 43% lower than the 3.0mΩ competitor. In addition, the power dissipation of the 3.6 milliohm PowerTrench MOSFET is mainly due to conduction losses under full load conditions, so its power consumption is lower than that of the 4.7 milliohm competitor. From the loss analysis summarized in Figure 12, it is evident that the 3.6 milliohm PowerTrench MOSFET has been optimized to reduce power dissipation at full and light load conditions.

Figure 12 Loss analysis of 800W synchronous rectifier circuit

Fairchild semiconductor has introduced a new family of PowerTrench power MOSFETs. These devices combine the advantages of a smaller QSYNCH with soft reverse recovery inherent body diode performance and fast switching to enable higher efficiency in rectification applications. Switching efficiency is improved and drive and output capacitive losses are reduced due to reduced gate charge and output capacitor stored energy. These benefits of PowerTrench MOSFETs can help designers significantly improve system efficiency.