STMicroelectronics’ ST8500 and S2-LP chipsets are the first to pass the G3-PLC Hybrid powerline and wireless two-media converged communication standard certification.
The G3-PLC Converged Communication Specification allows smart grid, smart city, industrial and IoT devices to automatically and dynamically select the best wireless or powerline connection available at any time based on network conditions, resulting in higher network coverage, connection reliability and system expansion It can also improve the cost-effectiveness of system operation and support new application scenarios.
STMicroelectronics showcased the world’s first ST8500 Hybrid chipset supporting the G3-PLC Hybrid Converged Communication Specification at the 2020 G3-PLC Alliance Interoperability Test Conference. Now, the chipset is the first to complete the latest certification program for G3-PLC. Released in March 2021, the plan includes a Hybrid fusion scenario test.
The new certified chipset integrates the ST8500 programmable multi-protocol powerline communication system-on-chip (SoC), STLD1 line driver and STMicroelectronics’ S2-LP ultra-low power sub-GHz RF transceiver. The programmability of this SoC chip enables various powerline communication protocol stack implementations in global frequency bands such as CENELEC and FCC.
The ST8500 powerline communication SoC platform is widely used in smart metering, smart industry and infrastructure. The new ST Hybrid total solution has been selected by major players in the smart grid market. In addition, the official RF certification test equipment of the G3-PLC Alliance also selected ST’s hardware and firmware solutions.
The ST8500 SoC is housed in a 7mm x 7mm x 1mm QFN56 package. Both STLD1 and S2-LP are available in a 4mm x 4mm x 1mm QFN24 package. All products are in mass production. For inquiries and samples, please contact your local STMicroelectronics sales office.
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ST8500 SoC implements 6LowPAN and IPv6 communication protocols, integrates radio frequency connection technology and native G3-PLC protocol stack, and receives power consumption of less than 100mW, ensuring ultra-low power consumption performance in line with the latest specifications. brought about by the load provisions. The chip has built-in high-performance DSP and ARM?Cortex?-M4F processor core, which are respectively used for real-time processing of protocols and upper-layer applications and system management tasks. Both the DSP and ARM cores have their own on-chip code and data SRAM memories, and peripherals such as 128/256-bit AES encryption engines are integrated to meet the needs of smart meter applications. The chip also integrates an analog front end (AFE) for connecting to the STLD1 line driver. The STLD1 chip features low impedance, high drive capability, and high linearity, enabling reliable communication even on fairly noisy power lines.
The S2-LP is a high-performance ultra-low-power RF transceiver for wireless communication applications in the sub-1 GHz frequency band, designed to operate in the license-exempt ISM and SRD frequency bands of 433, 512, 868 and 920 MHz, and can be configured into the 413-479 MHz, 452-527 MHz, 826-958 and 904-1055 MHz bands. The transceiver’s RF link budget exceeds 140dB, enabling long-range wireless communication and meeting radio equipment regulations in countries such as Europe, North America, China, and Japan. ST provides a matching high-integration balun/filter chip for the S2-LP, which simplifies the design of the antenna connection circuit and saves PCB area in space-constrained applications.
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