Meet the fail-safe requirements of 5G wireless infrastructure

If you’ve been following the news about 5G, you know that it can significantly increase bandwidth, up to 10Gbps. In addition, it also has a system latency of less than 1ms, and the power consumption is greatly reduced compared with the existing network. 5G will enable a host of new applications in areas such as the Industrial Internet of Things, vehicle-to-vehicle communications, and connected edge computing. In addition to high bandwidth and ultra-low latency, these applications need to have two other less interesting features, namely 99.99x% reliability and 24×7 availability. This article discusses important selection criteria for NOR Flash memory in wireless infrastructure applications.

Author: Cypress Manish Garg

If you’ve been following the news about 5G, you know that it can significantly increase bandwidth, up to 10Gbps. In addition, it also has a system latency of less than 1ms, and the power consumption is greatly reduced compared with the existing network. 5G will enable a host of new applications in areas such as the Industrial Internet of Things, vehicle-to-vehicle communications, and connected edge computing. In addition to high bandwidth and ultra-low latency, these applications need to have two other less interesting features, namely 99.99x% reliability and 24×7 availability. This article discusses important selection criteria for NOR Flash memory in wireless infrastructure applications.

technology

To respond to changing market standards with compressed time-to-market, field-programmable gate arrays (FPGAs) as well as complementary systems-on-chips (SoCs) are widely used in various wireless infrastructure applications. FPGAs and SoCs need to be configured at every system startup. FPGAs and SoCs can be configured with various types of memory, such as Flash, eMMC, unmanaged NAND, and SD cards. Unlike NAND Flash (managed or unmanaged) and SD cards, NOR Flash memory provides high reliability at initial response and boot with low latency, while remaining in the market for 10 years or more. In addition, advancements in MirrorBit technology (two bits per memory cell) support greater density scaling compared to floating gate technology. Higher densities enable single-chip 1Gb and higher-density NOR Flash products required for 5G wireless infrastructure. Because of these characteristics, NOR Flash memory has been widely used in wireless infrastructure applications to configure FPGAs and SoCs to boot these devices quickly and reliably.

Meet the fail-safe requirements of 5G wireless infrastructure

Figure 1: Schematic of the 5G system. The 64×64 antenna array increases the data transmission between the antenna and the digital front end, thereby placing higher processing requirements on the access unit (AU) and cloud unit (CU).

density

5G is capable of using frequency bands below 6GHz and frequency bands of 28GHz. These carrier frequencies are much higher than typical 4G LTE frequencies. While higher carrier frequencies have the potential to support more channels as the frequency increases, the propagation gets worse. At these frequencies, connections are limited to short-range line-of-sight due to the attenuation of free air and the inability of the signal to penetrate solid bodies.

Therefore, transceivers will have to rely on techniques such as beamforming. Beamforming provides constructive interference to enhance the signal at the receiving end, but cells must be connected more closely together. MIMO antennas and their RF front-ends are the keys to realizing 5G access units. For a base station, the antennas may be a 64×64 array. 64×64 MIMO will burst the fronthaul (the connection between the antenna and the digital front end) bandwidth requirements. The FPGA/SoC used in the access unit must have more logic elements (higher density), higher DSP capabilities, and more transceivers than those used in the 4G LTE digital unit. These increased demands will lead to larger configuration images, requiring higher density monolithic NOR Flash memory for configuring FPGA/SoC. For 5G access units, this density ranges from 512Mb to 2Gb.

interface

FPGAs and SoCs can configure/boot flash through two different interface types (parallel and serial). While the parallel interface supports faster read and write times, the interface requires too much IO. For example, consider interfacing a 1Gb parallel NOR Flash with an FPGA, the number of IOs required is 49. But with each increase in density (2G, 4G, 8G, etc.), the pin count increases by 1.

The NOR Flash serial interface is based on the SPI interface commonly found on controllers. It uses SPI (1-bit), Dual-SPI (2-bit), Quad-SPI or Q-SPI (4-bit) or even Octal-SPI (8-bit) interface. Engineers are migrating from parallel to serial interfaces for new system designs. Serial interfaces simultaneously reduce the pin count of memory and SoCs and shrink the PCB, thereby reducing cost and form factor. Octal SPI and HyperBus interfaces now offer up to 400MB/sec performance, comparable to parallel interfaces. Note that while the recently released Xilinx Versal FPGAs can support both Octal SPI and Q-SPI interfaces, 14nm and higher FPGAs/SoCs only support the Q-SPI interface.

Voltage

In addition to parallel and serial interfaces, the voltage requirements of the interface are also an important selection criterion. Today, FPGAs/SoCs for 5G will be developed at state-of-the-art process nodes and will reduce I/O support for 3V to improve IC reliability and performance. Most flash memories on the market are 3V components (meaning they need to operate from 2.7V to 3.6V). And the latest FPGA/SoC requires 1.8V NOR Flash components (these components need to operate from 1.7V to 2.0V). As FPGAs and other controllers continue to move toward smaller form factors and supply voltages, 1.2V NOR Flash components will now become available. While most NOR Flash components require only one supply voltage, 1.2V components require two different supplies. One for the core and the other for the IO (high and low conditions for input and output refer to VIOdefinition). Put VIOwith VCCSeparation provides system designers with more flexibility, but requires additional power.

Almost all 1.2V NOR Flash memories on the market are aimed at consumer applications. Consumer applications are inherently low-density compared to the demands of 5G wireless infrastructure applications, making it unsuitable to deploy FPGAs in these applications. Due to the available density options and broad support for 1.8V IO in FPGAs, 1.8V NOR Flash memory remains the most suitable NOR Flash for configuring various FPGAs or enabling SoCs for wireless infrastructure applications.

Temperature Ratings and Low Power Modes

Wireless infrastructure equipment, especially digital front ends such as radios and small cells, are often installed outdoors and challenged by extreme environmental conditions. To make matters worse, system designers may have limited ability to install heat sinks and fans on components used in 5G. Therefore, designers typically choose temperatures higher than industrial grades (-40OC to +105OC) NOR Flash components to withstand harsh environmental conditions, as well as to provide an additional guard band in terms of power dissipation and ensure startup and operation at the aforementioned high temperatures.

Deep power saving and standby mode

NOR Flash components are usually idle between FPGA/SoC configuration cycles. Deep power-saving and standby modes are available on some NOR Flash devices to help reduce power consumption by placing the NOR Flash device into a low-power state after configuration.

Durability and Data Retention

NOR Flash is optimized for reliability and performance, not cost (unlike consumer-oriented technologies such as NAND Flash and SD cards). This technology uses relatively large storage cells to provide high endurance and long data retention. It’s no surprise that we found a product with 100K program/erase (P/E) cycle endurance and data retention of up to 10 years. Note that typically people don’t worry about the durability of such applications because Flash can only be written to a small number of times. This is indeed the case if we only consider storing configuration images in Flash. In addition, some designers use Flash to cache transaction data and system error logs. In this usage scenario, the system log is updated in Flash every few minutes. Therefore, the total number of P/E cycles over an 8- to 10-year lifetime can exceed the maximum durability specification without wear leveling.

New products on the market enable engineers to optimize for the balance between durability and data retention by offering up to 1M P/E cycle durability or data retention options of 25 years. These higher reliability products sometimes come with detailed failure mode impact analysis that helps designers design systems to meet or exceed the ultra-high reliability and availability requirements of 5G specifications. For example, Cypress offers a variety of functional safety documents, including device safety manuals and detailed safety analysis reports that document product safety architecture and what-if usage, aggregated FIT rates, FMEDA results, complete safety analysis down to blockout levels , safety mechanisms and diagnostic coverage (see NOR Flash for Automotive and Functional Safety).

security function

There was a recent news report of a long-running large-scale attack on global telecommunications companies. The attackers leaked call data records in the attack, but they already took control of the network and could even shut it down, security research firm Cybereason said. Due to incidents like this, there is a growing focus on the protection of wireless infrastructure equipment. The easiest way to secure these systems is to protect the configuration image/boot code by deploying secure boot and access control processes. In response to the growing interest in securing embedded systems, NOR Flash vendors have started developing products with built-in security features, such as public key infrastructure-based authentication and access control and secure boot. These features can add additional measures to secure private IP, prevent tampering with configuration images/boot code, and ensure continuous availability of the network.

NOR Flash is more popular than NAND and SD cards for storing FPGA configuration images and SoC boot codes. 5G wireless infrastructure applications require 1Gb or higher density, 1.8V Q-SPI or Octal SPI, higher than industrial temperature NOR Flash to configure or boot the FPGA and/or SoC used in the system. As designers begin working on 5G wireless infrastructure products, there is a growing focus on fail-safe operation to meet the needs of applications such as e-health, Industrial Internet of Things (IIoT), and autonomous vehicles. Flash memory vendors are now starting to roll out products that offer functional safety and secure boot mechanisms. These capabilities enable designers to offload some of the processing of system-level safety and security functions into memory. In addition, available accessories help implement these functions and reduce time-to-market. Ultimately, choosing the right memory will help ensure the success of the product.

The Links:   NLB150XG01L-01 PM20CEF060-5