Keil MCBTWRK60 Tower system Kinetis K60 MCU development plan

Keil’s MCBTWRK60 Tower system can be used to evaluate the Freescale Kinetis K60 series device MK60N512VMD100, identifying hardware and software for current and future product development. The K60 MCU device includes IEEE 1588 Ethernet, full-speed and high-speed USB 2.0 OTG with charger function detection , hardware encryption and tamper detection functions, flash memory from 256kB to 1MB, and integrates rich analog, communication, timing and control peripherals. This article introduces the main features and block diagrams of Kinetis series MCUs, MCBTWRK60 evaluation board technical indicators and main features, evaluation Board block diagram and K60N512 CPU board circuit diagram, Primary Elevator board circuit diagram, Secondary Elevator board circuit diagram and serial interface board circuit diagram.

Kinetis is the most scalable portfolio of low power, mixed-signal ARM®Cortex™-M4 MCUs in the industry. Phase 1 of the portfolio consists of five MCU families with over 200 pin-,peripheral- and software-compatible devices. Each family offers excellent performance, memory and feature scalability with common peripherals, memory maps, and packages providing easy migration both within and between families.

Kinetis MCUs are built from Freescale’s innovative 90nm Thin Film Storage (TFS) flash technology with unique FlexMemory (configurable embedded EEPROM). Kinetis MCU families combine the latest low-power innovations and high performance, high precision mixed-signal capability with a broad range of connectivity, human-machine interface, and safety & security peripherals. Kinetis MCUs are supported by a market-leading enablement bundle from Freescale and numerous ARM 3rd party ecosystem partners.

Main features of Kinetis series MCU:
Keil MCBTWRK60 Tower system Kinetis K60 MCU development plan
All Kinetis families include a powerful array of analog, communication and timing and control peripherals with the level of feature integration increasing with flash memory size and the number of inputs/outputs. Features common to all Kinetis families include:

Main features of Kinetis series MCU:

• Core:

ARM Cortex-M4 Core delivering 1.25DMIPS/MHz with DSP instructions (floating-point unit available on certain Kinetis families)

• Up to 32-channel DMA for peripheral and memory servicing with minimal CPU intervention

• Broad range of performance levels rated at maximum CPU frequencies of 50 MHz, 72 MHz, and 100 MHz (120 MHz, 150 MHz, and 180 MHz available on certain Kinetis families)

• Ultra-low power:

• 10 low power operating modes for optimizing peripheral activity and wake-up times for extended battery life.

• Low–leakage wake-up unit, low power timer, and low power RTC for additional low power flexibility

• Memory:

Scalable memory footprints from 32 KB Flash / 8 KB RAM to 1 MB Flash / 128 KB RAM. Independent Flash banks enable concurrent code execution and firmware updates

• Optional 16 KB cache memory for optimizing bus bandwidth and flash execution performance

• FlexMemory with up to 512 KB FlexNVM and up to 16 KB FlexRAM. FlexMemory can be partitioned for data flash memory, EEPROM, or traditional RAM

• Mixed-signal analog:

Fast, high precision 16-bit ADCs, 12-bit DACs, programmable gain amplifiers, high speed comparators and an internal voltage reference. Powerful signal conditioning, conversion and analysis capability with reduced system cost

• Human Machine Interface (HMI):

• Capacitive Touch Sensing Interface with full low power support and minimal current adder when enabled

• Connectivity and Communications:

• UARTs with ISO7816 and IrDA support, I2S, CAN, I2C and DSPI

• Reliability, Safety and Security: Hardware cyclic redundancy check engine for validating memory contents / communication data and increased system reliability

• Independent-clocked COP for protection against code runaway in fail-safe applications

• External watchdog monitor

• Timing and Control:

• Powerful FlexTimers which support general purpose, PWM, and motor control functions

• Carrier Modulator Transmitter for IR waveform generation

• Programmable Interrupt Timer for RTOS task scheduler time base or trigger source for ADC conversion and programmable delay block

• External Interfaces:

• Multi-function external bus interface capable of interfacing to external memories, gate-array logic, or an LCD

• System:

• 5 V tolerant GPIO with pin interrupt functionality

• Wide operating voltage range from 1.71 V to 3.6 V with flash programmable down to 1.71 V with fully functional flash and analog peripherals

• Ambient operating temperature ranges from -40 ℃ to 105 ℃

The K60 MCU family includes IEEE 1588 Ethernet, full- and high-speed USB 2.0 On-The-Go with device charger detect capability, hardware encryption and tamper detection capabilities. Devices start from 256 KB of flash in 100LQFP packages extending up to 1 MB in a 256MAPBGA package with a rich suite of analog, communication, timing and control peripherals.

High memory density K60 family devices include an optional single precision floating point unit, NAND flash controller and DRAM controller.

Figure 1. K60 block diagram

The Keil MCBTWRK60 Tower System allows you to generate and test application programs for the Freescale Kinetis Kxx device family. With this hands-on process, you can determine the hardware and software requirements for current and future product development.

This TWR-K60N512 board is populated with the Freescale Kinetis MK60N512VMD100 microcontroller.

Figure 2. MCBTWRK60 Starter Kit Outline Drawing
MCBTWRK60 Evaluation Board Specifications:




MCU Vendor






ARM Processor


MCU Clock


Prototyping Area


3.55 x 3.55 x 3.55




On-Chip RAM





Push Buttons


I/O Port LEDs


Analog Input

Serial Ports


CAN Ports


USB Device Interface


Ethernet Interface


SD Card Interface

Debug Interface

JTAG Interface

SWD Interface

ETM Interface

20-pin Cortex Connector










The MCBTWRK60 is designed to be a very flexible evaluation board for the Freescale Kinetis family of microprocessors. The MCBTWRK60 evaluation board can be expanded to build hardware prototypes.

The Freescale Kinetis K60 microcontroller (U1) provided with the MCBTWRK60 board is a high-end MK60N512VMD100 device with advanced capabilities.

A 50.0 MHz oscillator (Y1) provides the clock signal for the CPU when a jumper is installed on pins 1-2 of jumper J6. Moving the jumper to pins 2-3 allows external clocking from another board via the Primary Elevator.

Figure 3. MCBTWRK60 Evaluation Board Outline Drawing

MCBTWRK60 Evaluation Board Key Features:

The connectors on the MCBTWRK60 evaluation board provide easy access to many of the on-chip peripherals.

USB 2.0 Full Speed ​​Interface

Standard USB connectors for USB Device, USB-OTG, USB Host and UART via USB on the MCBTWRK60 board for applications requiring USB communications.

Serial Port

A standard DB9 connector on the Serial board for Kinetis’s serial port provides RS232 and RS485 connectivity.

100/10M Ethernet Port

A standard RJ45 connector on the MCBTWRK60 Serial board connects to an on-board Ethernet transceiver for applications requiring Ethernet communications.

CAN Interface

A 3-pin header for applications requiring CAN communications on the MCBTWRK60 Serial board.


A 3-axis accelerometer for detecting and measuring motion in 3 dimensions on the MCBTWRK60 Serial board.

Touch Interface

Four touch pads on the TWR-K60N512 board connected to the Touch Sensing Input module in the MCU allow them to be used as push buttons in your application.SD Card Connector

A SD Card connector for developing applications requiring access to SD Cards.Analog Voltage Control for ADC Input

An adjustable analog voltage source is on the TWR-K60N512 board for testing the Analog to Digital output feature of the Kinetis device. A configuration jumper enables and disables this feature.

JTAG and Cortex/ETM Download and Debug

The TWR-K60N512 board incorporates a Cortex Debug + ETM interface. When coupled with the ULINK2 USB-JTAG adapter, the Serial Wire JTAG interface allows flash programming and debugging. With the ULINKPro adapter, the Cortex Debug/ETM interface allows flash programming and instruction trace debugging.

The MCBTWRK60 Tower system includes:

The TWR-K60N512 Module.

The TWR-SER Serial Module.

The Primary and Secondary TWR-ELEV Elevator Modules.

A µVision IDE Quick Start Guide.

An ARM Development Tools Overview.

The hardware block diagram displays input, configuration, power system, and User I/O on the TWR-K60 board and the Serial I/O board. This visual presentation helps you understand the MCBTWRK60 tower system components.

Figure 4. Block Diagram of MCBTWRK60 Evaluation Board
The Keil MCBTWRK60 comprises a number of boards, each has a separate schematic:

Figure 5. K60N512 CPU board block diagram

Figure 6. K60N512 CPU board circuit diagram (1)

Figure 7. K60N512 CPU board circuit diagram (2)

Figure 8. K60N512 CPU board circuit diagram (3)

Figure 9. K60N512 CPU board circuit diagram (4)

Figure 10. K60N512 CPU board circuit diagram (5)

Figure 11. Primary Elevator board circuit diagram

Figure 12. Secondary Elevator board circuit diagram

Figure 13. Serial Interface Board Circuit Diagram
For details, see:

The Links:   TFR7963ARHBR PM100CSD060