“Sonar systems use sound pulses to detect, identify and track underwater objects. A complete sonar system consists of a control and Display unit, a transmitter circuit, a receiver circuit, and a sensor that acts as both a transmitter (speaker) and a detector (high-sensitivity microphone).
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foreword
Sonar systems use sound pulses to detect, identify and track underwater objects. A complete sonar system consists of a control and Display unit, a transmitter circuit, a receiver circuit, and a sensor that acts as both a transmitter (speaker) and a detector (high-sensitivity microphone).
Sonar System Diagram
technical challenges
The sonar transmitter discussed in this article is a phased array transmitter capable of emitting frequencies from 10Khz to 100Khz. The system employs an array of transmitter modules, each capable of driving eight sonar sensors. The FPGA design contains several unique blocks: ARM processing center (Intel HPS), a waveform generator, channel interface, clock and chip timing, system monitoring and control, and status registers.
System Block Diagram
solution
This project adopts the Mercury SA1 core board (SOM) based on Intel FPGA (Altera) Cyclone V of Ruixu Yingke. It supports an arbitrary waveform generator of 64K entries, with scaling. Each core board controls eight channels of TX data. The waveform generator drives the waveform into eight instances of the channel module. The main purpose of this block is to provide a unique programmable delay on a per channel basis. Each PCB has four dual-channel digital-to-analog converters (DACs) from Analog Devices. The DAC accepts data from each channel with the same data bits on alternating phases of the input clock. In addition, Risus Pacific offers a menu-based build environment that includes a BSP to match the core board in use with one of several of Risus Pacific’s backplanes. In the configuration of this development project, the customer designed their carrier PCB to match the Mercury+ PE1 backplane from RISSO Yingke.
FPGA top-level block diagram
Conclusion and next steps
The conclusion that can be drawn from this project is that a core board-based system design approach can save engineering time, and when a team does not need to worry about the design and build of the base SOC/FPGA, they can start testing and debugging their custom circuits faster . FPGA code and testing as well as software development can begin when the carrier PCB is designed, and once complete, transferring the core board and code to the new PCB is a simple process. The sonar transmitter described here includes portable code and has the potential to be reused in receiver designs.
In addition to the Mercury SA1 core board, there are other core boards that can be considered for this application, such as the Mercury ZX5. The core board can achieve a high degree of integration of the hardware system and greatly shorten the development time. At the same time, by supporting various peripheral interfaces, future functional updates and expansions can be implemented more quickly and easily. Due to Ruixu Yingke’s huge product series, users can choose from a variety of core board modules in Xilinx Kintex-7, Zynq-7000, Zynq Ultrascale+ MPSoC and other series. The core board module of Ruixu Yingke is compatible with most other core board pins in its series (Mars, Mercury, Andromeda), which means that users can also plan a clear upgrade path and pay for the upgrade. The amount of engineering is greatly reduced, and the core board model can even be temporarily changed in the process of project development. The minimum expected life cycle of the FPGA core board module of Rui Su Yingke is more than 10 years. At the same time, when designing the hardware, it focuses on the availability and performance of the product, and all products can be delivered for a long time.
Ruisu Yingke core board module series
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